Traditional memory cells include a memory element, which is used to store a logic state, and a selector device. The memory element and selector device may be located at a cross-point of a first access line (e.g., word line) and a second access line (e.g., bit line) in a memory array having a cross-point architecture. The selector may be coupled to the word line and the memory element may be coupled to the bit line in some architectures. The memory element may be a phase change material in some architectures. The memory element may be programmed into one of two detectable states (e.g., set and reset) which may correspond to two logic states (e.g. ‘0’ and ‘1’). In some architectures, the two states may be differentiated by the threshold voltage of the memory cell.
The threshold voltage may be dependent on the state of the memory element and the selector device. The selector device may reduce leakage currents and allow selection of a single memory element for reading data and/or writing data. However, the threshold voltage of the selector device may drift over time. For example, the selector device may have threshold voltage unbiased drift, which may cause the threshold voltage of the selector device to continuously increase over time. The instability of the threshold voltage of the selector device may cause instability in the threshold voltage of the memory cell as a whole. Instability in the threshold voltage of the memory cell may make it more difficult or impossible to determine the state programmed to the memory cell.